1. Field of the Invention
The present invention relates to a method of algorithmic analog-to-digital conversion and an algorithmic Analog-to-Digital Converter (ADC), and more particularly, to a method and apparatus for efficiently performing analog-to-digital conversion using separate capacitors in an algorithmic ADC.
This work was supported by the IT R&D program of MIC/IITA. [2006-S-006-02. Components/Module technology for Ubiquitous Terminals].
2. Discussion of Related Art
To process an image signal in an image system, a precise analog signal must be converted into a digital signal insensitive to noise. This is performed by an ADC.
Image data output from a sensor is very precise and thus requires a high-resolution ADC capable of recognizing a minute signal. Besides image systems, communication and image processing application systems, such as mobile communications, Asynchronous Digital Subscriber Loops (ADSL), International Mobile Telecommunications-2000 (IMT-2000), digital camcorders and High-Definition Televisions (HDTVs), require a high-performance ADC having a high resolution of 12 bits to 14 bits and a high sampling speed of several tens of MHz.
Among various conventional ADCs, an algorithmic ADC is widely used to optimize a chip size and power consumption.
However, the conventional algorithmic ADC has a problem in the operating speed of a Sample and Hold Amplifier (SHA) due to capacitor-sharing between the SHA and a Multiplying Digital-to-Analog Converter (MDAC).